In recent years, semiconductor devices have become more integrated, and structures of semiconductor elements have become more complicated. Further, the number of layers in multilayer interconnections used for a logical system has been increased. Accordingly, irregularities on a surface of a semiconductor device become increased, so that step heights on the surface of the semiconductor device tend to be larger. This is because, in a manufacturing process of the semiconductor device, a thin film is formed on the semiconductor device, then micro machining processes, such as patterning or forming holes, are performed on the semiconductor device, and these processes are repeated many times to form subsequent thin films on the semiconductor device.
When the number of irregularities is increased on the surface of the semiconductor device, the following problems arise. The thickness of a film formed in a portion having a step is relatively small when a thin film is formed on the semiconductor device. An open circuit is caused by disconnection of interconnections, or a short circuit is caused by insufficient insulation between interconnection layers. As a result, good products cannot be obtained, and the yield tends to be reduced. Further, even if the semiconductor device initially works normally, the reliability of the semiconductor device is lowered after a long-term use. At the time of exposure in a lithography process, if the irradiation surface has irregularities, then a lens unit in an exposure system is locally unfocused. Therefore, if the irregularities of the surface of the semiconductor device are increased, then it becomes problematic that it is difficult to form a fine pattern itself on the semiconductor device.
Accordingly, in a manufacturing process of a semiconductor device, it increasingly becomes important to planarize a surface of the semiconductor device. The most important one of the planarizing technologies is CMP (Chemical Mechanical Polishing). In the chemical mechanical polishing, with use of a polishing apparatus, while a polishing liquid containing abrasive particles such as silica (SiO2) therein is supplied onto a polishing surface such as a polishing pad, a substrate such as a semiconductor wafer is brought into sliding contact with the polishing surface, so that the substrate is polished.
This type of polishing apparatus comprises a polishing table having a polishing surface constituted by a polishing pad, a top ring or a carrier head for holding a semiconductor wafer, and the like. When the semiconductor wafer is polished with use of such a polishing apparatus, the semiconductor wafer is held and pressed against the polishing table under a predetermined pressure by the top ring. At this time, the polishing table and the top ring are moved relatively to each other to bring the semiconductor wafer into sliding contact with the polishing surface, so that the surface of the semiconductor wafer is polished to a flat mirror finish.
In such a polishing apparatus, if a relative pressing force between the semiconductor wafer being polished and the polishing surface of the polishing pad is not uniform over an entire surface of the semiconductor wafer, then the semiconductor wafer may insufficiently be polished or may excessively be polished at some portions depending on the pressing force applied to those portions of the semiconductor wafer. Therefore, it has been attempted to form a surface, for holding the semiconductor wafer, of the top ring with use of an elastic membrane made of an elastic material such as rubber and to apply a fluid pressure such as an air pressure to a backside surface of the elastic membrane to uniform the pressing force applied to the semiconductor wafer over the entire surface of the semiconductor wafer.
Further, the polishing pad is so elastic that the pressing force applied to a circumferential edge portion of the semiconductor wafer being polished becomes non-uniform, and hence only the circumferential edge portion of the semiconductor wafer may excessively be polished, which is called “edge rounding”. In order to prevent such edge rounding, there has been used a top ring in which a semiconductor wafer is held at its circumferential edge portion by a guide ring or a retainer ring, and the annular portion of the polishing surface that corresponds to the circumferential edge portion of the semiconductor wafer is pressed by the guide ring or retainer ring.
When a semiconductor wafer is polished with use of such a top ring, it is necessary to attract and hold the semiconductor wafer which has been transferred to the top ring. Further, after the semiconductor wafer is polished, it is necessary to attract the semiconductor wafer again to the top ring and thereafter to release the semiconductor wafer from the top ring at a transfer position. However, the top ring using the above elastic membrane tends to fail in attracting and releasing the semiconductor wafer because of the presence of the elastic membrane.